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MK1493-01
PCI Clock Generator
Description
The MK1493-01 is a general purpose clock generator part that provides an integrated clocking solution for PCI /networking applications. It provides 8 individually programmable PCI clocks, 2 CPU clocks, additional fixed PCI clocks and a 25 MHz reference clock for LAN support. This part incorporates ICS's newest clock technology, offering more robust features and functionality. Using a serially programmable SMBus interface, the MK1493-01 can select the output clock frequency, and enabling/disabling each individual output clock.
Features
* 8 PCI clocks at 25, 33, 50, 66.66 MHz individually pin
selectableand serioal port slectable
* * * * * * * * * * *
2 CPU clocks at 100 MHz 2 PCI clocks at 66.66 MHz 1 PCI clock @ 50 MHz 25 MHz reference clock SMBus Programming Power-up default frequency can be selected through FS inputs 25 MHz crystal or clock input required PCICLK cycle to cycle jitter <250ps CPUCLK cycle to cycle jitter <100ps Packaged in 48-pin (240mil) TSSOP Package Operating Voltage 3.3V + - 5%
Block Diagram
VDD 7 8 SCLK SDATA FS(0:7)_A FS(0:7)_B 8 8 PLL Divider Buffer Circuits SMBus Programmable 2 PCICLK(0:7) Each PCI Output Clock Individually Programmable CPUCLK(100MHz)
2
66M CLK
50M CLK X1/CLK 25 MHz X2 7 GND Clock Buffer/ Crystal Ocsillator REFCLK
MDS 1493-01 B
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Revision 021204
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-01 PCI Clock Generator
Pin Assignment
FS3_A FS2_A FS1_A FS0_A GND VDD SCL SDA GND X1 X2 VDD REF25 VDD GND GND VDD CPUCLK0 CPUCLK1 FS7_B CLK50 FS6_B FS5_B FS4_B 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 FS4_A FS5_A FS6_A FS7_A FS0_B FS1_B PCICLK7 GND VDD PCICLK6 PCICLK5 PCICLK4 FS2_B VDD GND CLK66A0 CLK66A1 FS3_B VDD GND PCICLK2 PCICLK1 PCICLK0 PCICLK3
Pin Descriptions
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 Pin Name FS3_A FS2_A FS1_A FS0_A GND VDD SCL SDA GND X1/ICLK X2 VDD Pin Type Input Input Input Input Power Power Input Input Power Input XO Power Pin Description Frequency select input pin for PCI CLK3 per per table 1. Pull up resistor. Frequency select input pin for PCI CLK2 per per table 1. Pull up resistor. Frequency select input pin for PCI CLK1 per per table 1. Pull up resistor. Frequency select input pin for PCI CLK0 per per table 1. Pull up resistor. Connect to ground. Connect to +3.3 V. Clock pin for SMBus circuitry, 5 V tolerant. Data pin for SMBus circuitry, 5 V tolerant. Connect to ground. Crystal connection/input clock. Connect to a 25 MHz fundamental mode crystal. Crystal connection. Connect to a 25 MHz fundamental mode crystal or leave open. Connect to +3.3 V.
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Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-01 PCI Clock Generator
Pin Number 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
Pin Name REF25 VDD GND GND VDD CPUCLK0 CPUCLK1 FS7_B CLK50 FS6_B FS5_B FS4_B PCICLK3 PCICLK0 PCICLK1 PCICLK2 GND VDD FS3_B CLK66A1 CLK66A0 GND VDD FS2_B PCICLK4 PCICLK5 PCICLK6 VDD GND PCICLK7 FS1_B FS0_B FS7_A FS6_A FS5_A FS4_A
Pin Type
Pin Description
Output Buffered reference output of 25 MHz crystal input. Power Power Power Power Connect to +3.3 V. Connect to ground. Connect to ground. Connect to +3.3 V.
Output 100 MHz CPU clock. Output 100 MHz CPU clock. Input 1 of 4 frequency select input pin for PCI CLK7 per per table 1. Pull-up resistor.
Output 50 MHz clock output. Input Input Input Frequency select input pin for PCI CLK6 per per table 1. Pull-up resistor. Frequency select input pin for PCI CLK5 per per table 1. Pull-up resistor. Frequency select input pin for PCI CLK4 per per table 1. Pull-up resistor.
Output PCI CLK3. Output PCI CLK0. Output PCI CLK1. Output PCI CLK2. Power Power Input Connect to ground. Connect to +3.3 V. Frequency select input pin for PCI CLK3 per per table 1. Pull-up resistor.
Output Additional PCI Clock (fixed frequency 66 MHz ). Output Additional PCI Clock (fixed frequency 66 MHz ). Power Power Input Connect to ground. Connect to +3.3 V. Frequency select input pin for PCI CLK2 per per table 1. Pull-up resistor.
Output PCI CLK4. Output PCI CLK5. Output PCI CLK6. Power Power Connect to +3.3 V. Connect to ground.
Output PCI CLK7. Input Input Input Input Input Input Frequency select input pin for PCI CLK1 per per table 1. Pull-up resistor. Frequency select input pin for PCI CLK0 per per table 1. Pull-up resistor. Frequency select input pin for PCI CLK7 per per table 1. Pull-up resistor. Frequency select input pin for PCI CLK6 per per table 1. Pull-up resistor. Frequency select input pin for PCI CLK5 per per table 1. Pull-up resistor. Frequency select input pin for PCI CLK4 per per table 1. Pull-up resistor.
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Revision 021204
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-01 PCI Clock Generator
Table 1. Frequency Select
FS(0:7)_B 0 0 1 1 FS(0:7)_A 0 1 0 1 PCICLK(0:7) 25 MHz 33.33 MHz 50 MHz 66.66 MHz
Power Groups
Pin Number VDD 12 30, 40 35 6 17 14 GND 9 29, 41 34 5 16 15 Ref, Crystal Osc Power supply PCICLK PCI 66 clocks SCLK CPU Clocks(100MHz) PLL Beginning Byte N ACK O O O Byte N + X - 1 ACK P stoP bit Data Byte Count = X ACK Description Index Block Write Operation Controller (Host) T WR starT bit WRite ACK Beginning Byte = N ACK Slave Address D2 (H) ICS (Slave/Receiver)
General I2C Serial Interface Information
How to Write:
X Byte
O O O
* * * * * * * *
Controller (host) sends a start bit Controller (host) sends the write address D2 (H) ICS clock will acknowledge Controller (host) sends the beginning byte location = N ICS clock will acknowldege Controller (host) starts sending Byte N through Byte N+X-1(note 2) ICS clock will acknowledge each byte one at a time Controller (host) sends a Stop bit
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Revision 021204
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-01 PCI Clock Generator
How to Read:
* * * * * * * * * * * * * *
Controller (host) will send a start bit Controller (host) sends the write address D2 (H) ICS clock will acknowledge Controller (host) sends the beginning byte location = N ICS clock will acknowldege Controller (host) will send a separate start bit Controller (host) sends the read address D3 (H) ICS clock will acknowldege ICS clock will send the data byte count = X ICS clock sends Byte N+X-1 ICS clock sends Byte 0 through Byte X (if X(H) was written to Byte 8) Controller (host) will need to acknowledge each byte Controller (host) will send a not acknowledge bit Controller (host) will send a stop bit
Index Block Read Operation Controller (Host) T WR starT bit WRite ACK Beginning Byte = N ACK RT RD Repeat starT ReaD ACK Data Byte Count=X ACK Beginning Byte N ACK X Byte O O O Byte N + X - 1 N P Not stoP bit O O O Slave Address D3 (H) Slave Address D2 (H) ICS (Slave/Receiver)
SMBus Table 2: Read-Back Register
Byte 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Pin # Frequency Selection See Frequency table 3 FS vs. SMBus prog Name Control Function RESERVED HW/SW select RESERVED RESERVED RESERVED RW HW SW Type 0 1 PWD 0 0 0 0 0 0 0 0
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Revision 021204
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-01 PCI Clock Generator
SMBus Table 2: Output Control Register
Byte 1 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Pin # 40 39 38 37 31 28 27 26 Name PCICLK7 PCICLK6 PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLK1 PCICLK0 Control Function Output Control Output Control Output Control Output Control Output Control Output Control Output Control Output Control Type RW RW RW RW RW RW RW RW 0 Disable Disable Disable Disable Disable Disable Disable Disable 1 Enable Enable Enable Enable Enable Enable Enable Enable PWD 1 1 1 1 1 1 1 1
SMBus Table 2: Output Control Register
Byte 2 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Pin # 32 33 12 19 18 20 CLK66A1 CLK66A0 REF25 CPUCLK1 CPUCLK0 CLK50 Name Control Function RESERVED RESERVED Output Control Output Control Output Control Output Control Output Control Output Control RW RW RW RW RW RW Disable Disable Disable Disable Disable Disable Enable Enable Enable Enable Enable Enable Type 0 1 PWD 0 0 0 1 0 1 1 1
SMBus Table 2: Frequency Control Register
Byte 3 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Pin # 4 44 3 43 2 36 1 31 Control Function FS0_A FS0_B FS1_A FS1_B FS2_A FS2_B FS3_A FS3_B Type RW RW RW RW RW RW RW RW See Frequency Table 1 0 1 PWD X X X X X X X X
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Revision 021204
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-01 PCI Clock Generator
SMBus Table 2: Frequency Control Register
Byte 4 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Pin # 48 24 47 23 46 22 45 20 Control Function FS4_A FS4_B FS5_A FS5_B FS6_A FS6_B FS7_A FS7_B Type RW RW RW RW RW RW RW RW See Frequency Table 1 0 1 PWD X X X X X X X X
SMBus Table 2: Reserved
Byte 5 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Pin # Control Function RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED Type 0 RESERVED 1 PWD 0 0 0 0 0 0 0 0
SMBus Table 2: Reserved
Byte 6 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Pin # Control Function RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED Type 0 RESERVED 1 PWD 0 0 0 0 1 0 0 0
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Revision 021204
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-01 PCI Clock Generator
MBus Table 2: Vendor and Revision ID Register
Byte 7 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Pin # Control Function RID3 RID2 RID1 RID0 VID3 VID2 VID1 VID0 Type R R R R R R R R VENDOR ID 0 REVISION ID 1 PWD 0 0 0 0 0 0 0 1
MBus Table 2: Byte Count Register
Byte 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Pin # Control Function BC7 BC6 BC5 BC4 BC3 BC2 BC1 BC0 Type RW RW RW RW RW RW RW RW 0 1 PWD 0 0 0 0 1 0 0 0
Writing to this Register will confirm how many bytes will be read back, default 08=8 bytes
Tabel 3. Frequency Selection through SMBus (Byte 0)
Bit 2 0 0 0 0 1 Bit 1 0 0 1 1 0 Bit 0 0 1 0 1 0 CPUCLK1,0 (MHz) 100.00 105.00 110.00 95.00 90.00 CLK50 (MHz) 50.00 nominal + 5% nominal + 10% nominal - 5% nominal - 10% CLK66A1,A0 (MHz) 66.66 nominal + 5% nominal + 10% nominal - 5% nominal - 10% PCICLK (MHz) nominal nominal + 5% nominal + 10% nominal - 5% nominal - 10%
MDS 1493-01 B
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Revision 021204
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-01 PCI Clock Generator
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK1493-01. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Recommended Operation Conditions
Item
Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature 5.5 V -0.5 V to VDD+0.5 V 0 to +70C -65 to +150C 125C 260C
Rating
Parameter
Ambient Operating Temperature Power Supply Voltage (measured in respect to GND)
Min.
0 +3.15
Typ.
3.3
Max.
+70 +3.45
Units
C V
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V+-5%, Ambient Temperature 0 to +70C
Parameter
Input High Voltage Input Low Voltage Input High Current Input Low Current
Symbol
VIH VIL IIH IIL1
Conditions
Min.
2
Typ.
Max.
0.8
Units
V V A A
VIN=VDD VIN=0V, SDA, SCL inputs with no pull-up resistors. VIN=0V, All other inputs with pull-up resistors CL = Full load Note 3 Note 1
-5 -5
5
IIL2 Operating Supply Current Input Frequency Pin Inductance IDD FIN LPIN
-200 350 25 7
A mA MHz nH
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Revision 021204
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-01 PCI Clock Generator
Parameter
Input Capacitance Note 1
Symbol
CIN COUT CINX
Conditions
Logic inputs Output pin capacitance X1 and X2 pins
Min.
Typ.
Max.
5 6 5
Units
pF pF pF
From VDD Power-up 3 ms Note 2 Note 1: Guaranteed by design, not 100% tested in production. Note 2: See timing diagrams for timing requirements. Note 3: Input frequency should be measured at the REF output pin and tuned to ideal 25 MHz to meet ppm frequency accuracy on PLL outputs.
CLK Stabilization
TSTAB
Electrical Characteristics - CPUCLK
Unless stated otherwise, VDD = 3.3 V+-5%, CL=20 pf, Ambient Temperature 0 to +70 C
Parameter
Output Frequency Output Impedance Output High Voltage Output Low Voltage Output High Current Output Low Current Rise Time Fall Time Duty Cycle Output to Output Skew Cycle to Cycle Jitter
Symbol
FO1 RDSP VOH VOL IOH IOL tr1 tf1 dt1 tsk1
Conditions
VO = VDD*(0.5) Note 1 IOH = -12 mA, Note 1 IOL = 12 mA, Note 1 VOH@MIN = 2.0 V, Note 1 VOL@MAX = 0.8 V Note 1 VOL = 0.4 V, VOH = 2.4 V, Note 1 VOH = 2.4 V, VOL = 0.8 V, Note 1 VT = 1.5 V VT = 1.5 V VT = 1.5 V
Min.
12 2.4
Typ.
100
Max. Units
MHz 55 V
0.3
0.4 -19
V mA mA
19 1.2 1.2 45 50 50 1.7 1.7 55 175 100
ns ns % ps ps
Note 1: Guaranteed by design, not 100% tested in production
Electrical Characteristics - CLK50, CLK66A0 & CLK66A1
Unless stated otherwise, VDD = 3.3 V+-5%, CL= 20 pf, Ambient Temperature 0 to +70 C
Parameter
Output Frequency Output Impedance Output High Voltage
Symbol
FO1 RDSP VOH
Conditions
VO = VDD*(0.5) Note 1 IOH = -12 mA, Note 1
Min.
12 2.4
Typ.
50&66
Max. Units
MHz 55 V
MDS 1493-01 B
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Revision 021204
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-01 PCI Clock Generator
Parameter
Output Low Voltage Output High Current Output Low Current Rise Time Fall Time Duty Cycle Output to Output Skew (CLK66A0, A1) Cycle to Cycle Jitter
Symbol
VOL IOH IOL tr1 tf1
Conditions
IOL = 12 mA, Note 1 VOH@MIN = 2.0 V, Note 1 VOH@MAX = 0.8 V Note 1 VOL = 0.4V, VOH = 2.4 V, Note 1 VOH = 2.4 V, VOL = 0.4 V, Note 1 VT = 1.5 V VT = 1.5 V VT = 1.5 V
Min.
Typ.
0.3
Max. Units
0.4 -19 V mA mA
19 1.2 1.2 45 50 1.7 1.7 55 175 250
ns ns % ps ps
Note 1: Guaranteed by design, not 100% tested in production
Electrical Characteristics - PCICLK
Unless stated otherwise, VDD = 3.3 V+-5%, CL=30 pf, Ambient Temperature 0 to +70 C
Parameter
Output Frequency Output Impedance Output High Voltage Output Low Voltage Output High Current Output Low Current Rise Time Fall Time Duty Cycle Output to Output Skew Cycle to Cycle Jitter
Symbol
FO1 RDSP VOH VOL IOH IOL tr1 tf1 FS0
Conditions
VO = VDD*(0.5) Note 1 IOH = -1 mA, Note 1 IOL = 1 mA, Note 1 VOH@MIN = 2.0 V, Note 1 VOL@MAX = 0.8 V Note 1 VOL = 0.4 V, VOH = 2.4 V, Note 1 VOH = 2.4 V, VOL = 0.4 V, Note 1 VT = 1.5 V VT = 1.5 V VT = 1.5 V
Min.
12 2.4
Typ.
25
Max. Units
MHz 55 V 0.55 V mA mA
-33 30 1.7 1.7 45 50 2.4 2.4 55 250 250
ns ns % ps ps
Note 1: Guaranteed by design, not 100% tested in production
MDS 1493-01 B
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Revision 021204
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-01 PCI Clock Generator
Electrical Characteristics - 25 MHz Reference
Unless stated otherwise, VDD = 3.3 V+-5%, CL=20 pf, VDD = 3.3 V, Ambient Temperature 0 to +70 C
Parameter
Output Frequency Output Impedance Output High Voltage Output Low Voltage Output High Current
Symbol
FO1 RDSP VOH VOL IOH
Conditions
VO = VDD*(0.5) Note 1 IOH = -1 mA, Note 1 IOL = 1 mA, Note 1 VOH@MIN = 1.0 V, VOH@MAX = 3.135 V Note 1 VOL@MAX = 0.8 V Note 1 VOL = 0.4 V, VOH = 2.4 V, Note 1 VOH = 2.4 V, VOL = 0.4 V, Note 1 VT = 1.5 V VT = 1.5 V
Min.
20 2.4
Typ.
25
Max. Units
MHz 60 V 0.4 V mA
-29
Output Low Current Rise Time Fall Time Duty Cycle Jitter Cycle to Cycle
IOL tr1 tf1
29 1.2 1.2 45 50 1.7 1.7 55 500
mA ns ns % ps
Note 1: Guaranteed by design, not 100% tested in production
MDS 1493-01 B
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Revision 021204
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-01 PCI Clock Generator
Package Outline and Package Dimensions (48-pin TSSOP, 240 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
N
c
L
INDEX AREA
E1
E
12 D
6.10 mm. Body, 0.40 mm. Pitch TSSOP (240 mil) (16 mil) In Millimeters In Inches SYMBOL COMMON DIMENSIONS COMMON DIMENSIONS MIN MAX MIN MAX A -1.20 -.047 A1 0.05 0.15 .002 .006 A2 0.80 1.05 .032 .041 b 0.13 0.23 .005 .009 c 0.09 0.20 .0035 .008 D 12.40 12.60 0.488 0.496 E 8.10 BASIC 0.319 BASIC E1 6.00 6.20 .236 .244 0.5 BASIC 0.02 BASIC e
A2 A1
A
-Ce
b SEATING PLANE
aaa C
Ordering Information
Part / Order Number
MK1493-01G MK1493-01GTR
Marking
MK1493-01G MK1493-01G
Shipping packaging
Tubes Tape and Reel
Package
48-pin TSSOP 48-pin TSSOP
Temperature
0 to +70 C 0 to +70 C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 1493-01 B
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Revision 021204
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com

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